When fabricating an integrated circuit, it is known to apply a dielectric layer over a conductive region, and to create a via opening or contact opening through the dielectric layer to the conductive region. The opening may be cylindrical with a vertical wall surface, or may have an upwardly diverging frustoconical shape, which is sometimes referred to as a positive taper. Then, a barrier layer is applied over the dielectric layer, and also covers the exposed surface within the opening.
A metal layer is then deposited over the barrier layer. As the metal layer is deposited, it should be thick enough to pinch off or close the upper end of the opening through the dielectric layer. This usually leaves a cavity in the portion of the metal layer which is disposed within the opening through the dielectric layer. After the metal layer has been deposited, heat and pressure are simultaneously applied, in order to cause the metal to flow so as to eliminate the cavity and completely fill the available space within the opening through the dielectric layer. This is sometimes referred to as reflow of the metal layer. Thereafter, the portion of the metal layer on top of the dielectric layer is typically etched, in order to leave an arrangement of interconnects on top of the dielectric layer. Much of the metal in the metal layer is removed during the etching process.
While this known technique has been generally adequate for its intended purposes, it has not been satisfactory in all respects. For example, in order to ensure that the metal layer will flow so as to eliminate the cavity and fill the available space within the opening, the metal layer must be sufficiently thick when applied to completely pinch off or close the upper end of the opening through the dielectric layer. Since the opening through the dielectric layer has a positive taper or is cylindrical, the applied metal layer must be relatively thick in order to pinch off or close the upper end of the opening. This requires the use of a substantial amount of raw metal, which increases the overall cost of the integrated circuit. Further, to the extent that the portion of the metal layer on top of the dielectric layer is subsequently etched, the thickness of the metal layer means that a significant amount of metal is etched away and discarded during the etching process, and that the production time required for the etching procedure is longer than desirable.
After etching, a dielectric layer is typically applied over the remaining portions of the metal layer. Since the original metal layer was relatively thick, the remaining portions of it will be relatively thick, which in turn means that the dielectric layer will have to be relatively thick, all of which leads to an increased overall thickness for the integrated circuit.
A further consideration relates to the fact that the smallest cross-sectional size or area of the opening determines the resistance to current flow through the metal disposed in the opening. In theory, it is possible to increase the size of the opening, in order to increase the smallest cross-sectional size and thereby reduce the resistance to current flow. However, since the opening is cylindrical or positively tapered, increasing the size inherently increases the size of the opening at its upper end, which in turn increases the thickness which the metal layer must have in order to pinch off or close the upper end of the opening.